Core Logic releases new ISP product which matches the performance of the latest digital camera

          -     Core Logic releases next generation Image Signal Processor, “ISP3 Plus”
          -     Performance that matches the quality of the latest digital camera
          -     Supports various functions such as Face Detection, Best Picture, and Anti-Shake
          -     MIPI interface improves power efficiency and achieves cost reduction

Seoul, Korea - December 1, 2008 - Korea’s leading fabless semiconductor manufacturer Core Logic (048870 CEO Ki Soo Hwang www.corelogic.co.kr) announced the release of its next generation ISP product, “ISP3Plus,” today. ISP is the acronym for “Image Signal Processor” and it maximizes image quality such as color expression and sharpness, and supports additional functions as well as face detection, anti-shake, and image effects in mobile phones. This is Core Logic’s key product along with the Multimedia Application Processor(MAP) and the Camera Application Processor(CAP).

The ISP3Plus released today is topped on mobile phones with camera modules supporting up to 5 megapixels of resolution and high speed processing up to 15 frames per second. Not only does the ISP3Plus enable digital camera-like resolution, but it features additional functions that have pulled public attention recently.

In addition to core 3A functions, ISP3Plus offers powerful Lens Shading Correction, Smart Contrast Control, and Edge Enhancement which supports elaborate resolution in 5M images. With this product, Core Logic has succeeded in providing premium digital camera-like resolution which translates into clean, lively, and sharp images.

Face detection or face tracking which allows a maximum of 10 faces to be tracked in a single frame has been included as a new feature, and in connection with 3A functions; focus, exposure, and white balance are automatically corrected. Also, the “Best Pictures” function is offered which automatically recommends the best picture after nine continuous shots, and other functions have been included to enable digital camera-like fun in mobile phones such as free editing of photo size and direction, 16x digital zoom, and anti-shock.

Furthermore, a JPEG compression engine has been embedded to convert high speed data into a stable low speed data interface for the transfer of data into an outside chip, and as for the interface, in addition to the previous method, MIPI(Mobile Industry Processor Interface) is supported as well. MIPI improves the image processing speed by increasing the connectivity between the sensor and ISP3Plus which is expected to increase power efficiency and achieve cost savings in production.

“ISP3Plus has proven itself through an internal demo to be an epoch-making product which greatly reduces the gap in resolution between exclusive digital cameras and mobile phone cameras. Already people are talking about the excellent performance of the ISP3Plus and expectations are increasing,” said Core Logic CEO Ki Soo Hwang after an in-house demo of the product. “ISP3Plus is significant because it has once again proven Core Logic’s position as the technological market leader with its excellent video/image capabilities. We plan to focus on driving revenue through systematic marketing and sales activities,” added the CEO.

Prior to the launching of the ISP3Plus, Chief Researcher Seong-Cheon Jeon who orchestrated the design of the chip received the Core Technology Award in the Category for Technology Development by the Minister of Knowledge Economy at the 1st Semiconductor Day Ceremony held on October 29, 2008.